* Network

Currently defined compatibles:
- fsl,cpm1-scc-enet
- fsl,cpm2-scc-enet
- fsl,cpm1-fec-enet
- fsl,cpm2-fcc-enet (third resource is GFEMR)
- fsl,qe-enet

Example:

	ethernet@11300 {
		compatible = "fsl,mpc8272-fcc-enet",
			     "fsl,cpm2-fcc-enet";
		reg = <11300 20 8400 100 11390 1>;
		local-mac-address = [ 00 00 00 00 00 00 ];
		interrupts = <20 8>;
		interrupt-parent = <&PIC>;
		phy-handle = <&PHY0>;
		fsl,cpm-command = <12000300>;
	};

* MDIO

Currently defined compatibles:
fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
fsl,cpm2-mdio-bitbang (reg is port C registers)

Properties for fsl,cpm2-mdio-bitbang:
fsl,mdio-pin : pin of port C controlling mdio data
fsl,mdc-pin : pin of port C controlling mdio clock

Example:
	mdio@10d40 {
		compatible = "fsl,mpc8272ads-mdio-bitbang",
			     "fsl,mpc8272-mdio-bitbang",
			     "fsl,cpm2-mdio-bitbang";
		reg = <10d40 14>;
		#address-cells = <1>;
		#size-cells = <0>;
		fsl,mdio-pin = <12>;
		fsl,mdc-pin = <13>;
	};

* HDLC

Currently defined compatibles:
- fsl,ucc_hdlc

Properties for fsl,ucc_hdlc:
rx-clock-name : which clock QE use for RX
tx-clock-name : which clock QE use for TX
fsl,rx-sync-clock : which pin QE use for RX sync
fsl,tx-sync-clock : which pin QE use for TX sync
fsl,tx-timeslot : tx timeslot
fsl,rx-timeslot : rx timeslot
fsl,tdm-framer-type : tdm framer type
fsl,tdm-mode : tdm mode, normal or internal-loopback
fsl,tdm-id : tdm ID
fsl,siram-entry-id : SI RAM entry ID for the TDM
fsl,tdm-interface : hdlc based on tdm-interface

Example:

	ucc@2000 {
		compatible = "fsl,ucc_hdlc";
		rx-clock-name = "clk8";
		tx-clock-name = "clk9";
		fsl,rx-sync-clock = "rsync_pin";
		fsl,tx-sync-clock = "tsync_pin";
		fsl,tx-timeslot = <0xfffffffe>;
		fsl,rx-timeslot = <0xfffffffe>;
		fsl,tdm-framer-type = "e1";
		fsl,tdm-mode = "normal";
		fsl,tdm-id = <0>;
		fsl,siram-entry-id = <0>;
		fsl,tdm-interface;
	};
